This invention generally relates to pattern defect detection and more particularly to a pattern defect detecting method and apparatus suitable for highly reliable checking of defects in a semiconductor device circuit pattern on an LSI wafer in the form of a resist pattern before etching.
Illustrated at sections (a) and (b) in FIG. 1 are enlarged views of a part of a circuit pattern on a semiconductor wafer, with a perfect pattern 1 of the part devoid of any defects illustrated at (a) in FIG. 1 and a defective pattern 3 of the same part inclusive of a projection 2a, a break in a wire 2b and an isolated defect 2c illustrated at (b) in FIG. 1. Conventionally, in order to check defects in the circuit pattern, a reference pattern on a wafer and a pattern to be checked which is formed on the same wafer are imaged, two images of these patterns are compared to each other, and any portion at which the two images differ from each other is determined to be a defect.
In the above method, however, even when the reference pattern and the pattern to be checked which are formed on the same wafer and picked up by means of image pickup devices are located in perfect register relationship with each other, mis-registration occurs as illustrated at (c) in FIG. 1 between the reference pattern 1 (dotted line) and the checked pattern 3 (solid line) at portions other than the defective portions 2a to 2c. Presumably, the above mis-registration is caused for the reasons described below.
(a) The two patterns are formed in delicately different configurations, though not leading to occurrence of defects, during wafer production processes such as exposure, development and etching.
(b) The pattern images are distorted owing to aberration of optical systems for imaging the two patterns to be compared with each other and to errors in travel of stages carrying the wafers.
Consequently, as illustrated at (d) in FIG. 1, mis-registration between the reference pattern 1 and the check pattern 3 occurs at portions other than defective portions 2a' to 2c', especially, at the pattern contour, resulting in spurious defects 4.
A method for elimination of such spurious defects 4 has been proposed as disclosed in, for example, Japanese Patent Publication No. 54-37475. According to this proposal, mis-register portions between a reference pattern and a pattern to be checked are detected as candidates for defects and at the same time, only the pattern contour is extracted from either of the reference pattern and the check pattern. Then, portions common to the pattern contours of the respective reference and check patterns are extracted from the two pattern contours, and some of the candidates for defects sorted out as the common contour portions are recognized as spurious defects and excluded to thereby detect only true defects.
The second conventional method succeeds in detecting the break 2b and isolated defect 2c shown at (b) in FIG. 1 but this method can not satisfactorily detect the small projection 2a which occurs at the pattern contour and is likely to be covered by a common contour portion mentioned above. If the size of individual pixels used for pattern detection is decreased to meet the detection of such a small defect, then checking speeds will be decreased and throughput of the checking apparatus will disadvantageously be degraded.
A method disclosed in Japanese Patent Publication No. 59-42904 may be employed as a defect checking method which is not affected by the delicate size difference between the comparative patterns and the image distortion. In this conventional method, featuring points of the two comparative patterns, such as points of inflexion, are extracted from these patterns. Normality is recognized when the featuring points of both the patterns fall within a permissible range of a predetermined amount of mis-registration but the presence of a defect is determined when a featuring point of one pattern lies and a featuring point of the other pattern does not lie within the permissible range.
Accordingly, the last-mentioned method succeeds in accommodating the delicate size difference between the two patterns and the image distortion to the permissible mis-registration, thus preventing generation of spurious defects. But, disadvantageously, all defects of a variety of configurations are difficult to detect in terms of the featuring point and there is a possibility that a small defect is accidentally overlooked. Further, when the pattern is thick or thin as a whole, a size difference between the comparative patterns which is to be detected as a defect is disadvantageously accommodated to the permissible mis-registration and accepted.
Incidentally, in recent years, semiconductor integrated circuits have been realized with very highly integrated circuits of very high density and fine defects present in circuit patterns do harm to the operation of the circuits with high probabilities. In the prior art, however, the detection of small defects can not be accomplished without increasing the probability of detecting spurious defects. Under these circumstances, the advent of an expedient capable of detecting only true defects without detection of spurious defects is desired urgently.